Challenges and Opportunities on Co-Packaged Optics Thermal-Mechanical Performance Towards High-Volume Ramping

  Dr. Shaw Fong Wong

  Principal Engineer & Engineering Director，Intel Corporation

Abstract: 

Co-Packaged Optics (CPO) is widely viewed as a key technology for enabling the bandwidth density and energy efficiency required by AI, high-performance computing, and next-generation data centre infrastructure. As the industry moves from prototype demonstrations to volume deployment, thermal-mechanical performance is becoming a critical determinant of manufacturability, yield, reliability, and supply chain scalability.

This discussion will cover key thermal-mechanical challenges associated with integrating silicon/optical engines, advanced substrates, and fibre assemblies within a single package. Topics include thermal coupling between optical and electrical components, package warpage control, fibre attach robustness, thermo-mechanical stress management, and field reliability considerations. The impact of these challenges on assembly yield, known-good-die strategies, repairability, and manufacturing readiness will also be examined.

The presentation will further explore opportunities together on reliability-aware manufacturing practices, providing a platform to discussion on accelerating CPO adoption toward high-volume production.

Speaker's Biography: 

Dr. Shaw Fong Wong serves as the IEEE Electronic Packaging Society (EPS) Region 10 Program Director, where he drives regional IEEE initiatives in semiconductor packaging, talent development, and industry-academia collaboration across Asia-Pacific. He is also an active Exco Members of the IEEE Malaysia Section, contributing to industry relations and ecosystem engagement. Dr. Wong is a registered Professional Engineer (Ir.) with the Board of Engineers Malaysia (BEM) and currently serves as an Industry Advisory Panel (IAP) member to leading universities, including University of Malaya, Universiti Malaysia Perlis, and Xiamen University Malaysia, supporting curriculum development aligned with industry needs. He is an elected Fellow of the ASEAN Academy of Engineering and Technology (AAET). With a Ph.D. in electronic packaging, Dr. Wong has authored over 100 technical publications and holds 14 patents and trade secrets. He is currently a Principal Engineer and Engineering Director at Intel Malaysia, based in Kulim, Kedah, with over 25 years of experience in semiconductor technology and advanced packaging.