Advanced Packaging EDA's New Paradigm: Collaborative Innovation Revolution for Design-Simulation-Verification in the 2.5D/3D Era

Dr. Alex ZHAO

Founder and Chief Scientist, Zhuhai Silicon Chip Technology Ltd.       

                                                                                                

Abstract:

The adoption of advanced packaging technologies like Chiplet and 2.5D/3D IC stacking is driving innovation in the semiconductor industry, break through bottleneck in Memory/Power/Area Walls. However, this technological evolution introduces new challenges: next-generation EDA toolchains for stacked IC must address novel package structures such as TSVs while managing the exponentially increased complexity in placement and routing caused by Multi-Die integration. Ultra-high-density heterogeneous integration further escalates the difficulty of Multi-Physics simulation. Moreover, implementing advanced packaging requires breakthroughs beyond isolated segments—it necessitates a deeply collaborative ecosystem spanning the entire industry chain, including EDA tools, foundry processes, and OSAT.

This presentation will conduct an in-depth analysis of 2.5D/3D advanced packaging EDA technologies. It shares a stacked IC EDA platform featuring dual-system collaborative optimization: "Chiplet-Interposer-Package Co-Design" and "Performance-Cost-Testability Co-Optimization." The discussion will cover critical solutions for backend 2.5D/3D IC design challenges, including placement and routing, DFT tools, and full-flow implementation challenges.

Speaker's Biography:

Holding a Ph.D. from the University of Southampton, UK, under the supervision of Royal Society Fellow Professor Bashir Hashimi, he embarked on 2.5D/3D stacked IC design research in 2008 as part of one of the world's earliest pioneering research teams exploring advanced chip architecture methodologies, having collaborated with IMEC for 3D IC technology validation. With 15 years of dedicated R&D in 3D integrated circuit design, he has published several excellent papers and awarded the VLSI-SOC Best Paper.

Currently serving as Founder and Chief Scientist at Zhuhai Silicon Chip Technology Ltd. , he has been a majority of leading national research initiatives. He directs the team in developing self-proprietary 2.5D/3D IC stacked IC EDA tools, enabling critical advancements in the semiconductor industry through backend full-flow EDA tools and solutions.