Bridging PCB and Advanced Packaging: Our Journey Toward Package-Aware Design
Mr. Liang JIA
Director in Semiconductor BU，Huatek，China
Speaker Biography:
Explores the evolution of PCB design methodologies toward advanced packaging and heterogeneous system integration. As chiplet architectures, high-bandwidth memory (HBM), and UCIe-based interconnects reshape system design, traditional PCB-centric EDA tools are increasingly insufficient to address multi-die, high-density, and cross-domain integration challenges.
This presentation shares practical insights from extending a PCB design platform toward package-aware capabilities, including Flip-Chip and Wire Bond support, as well as emerging modeling requirements for micro-bumps, RDL, and hierarchical interconnect structures. It highlights key architectural changes required to move from flat board-level design toward hierarchical, system-level representation.
Speaker's Biography:
A software engineering professional with extensive experience in EDA software development, test engineering, and semiconductor manufacturing workflows. Since graduating in 2007, has worked across software development, test program design, and tester engineering platform integration, with solid expertise in PCB design tools and end-to-end manufacturing processes.
Currently responsible for the development and product direction of a PCB design software platform, driving its evolution toward advanced packaging and heterogeneous system integration capabilities. Key focus areas include support for Flip-Chip and Wire Bond design, as well as advanced packaging requirements such as multi-die connectivity, micro-bump and RDL modeling, and high-density interconnect optimization.
Current work emphasizes bridging traditional PCB design methodologies with emerging advanced packaging technologies, enabling the transition toward system-level electronic design platforms that support chip-package-board co-design under a unified data and architecture framework.