AI is accelerating the shift to advanced packaging with PLP and glass cores

  
  Dr. Yik-Yee TAN
  Principal Market & technology Analyst, Yole Group

Abstract:

The semiconductor industry continues to grow at a rapid pace, fueled by increasing demand from artificial intelligence, automotive electronics, and consumer applications. As the physical and economic limitations of conventional device scaling become more pronounced, advanced packaging has emerged as a key enabler of higher performance, greater integration, and continued system miniaturization. Within this landscape, next-generation packaging platforms such as panel-level packaging (PLP) and glass core substrates are attracting significant attention as technologies that could shape the future of semiconductor manufacturing.

Driven by the rapid expansion of AI computing, the semiconductor industry is seeking packaging solutions capable of supporting larger package sizes, higher I/O densities, and improved manufacturing efficiency. Panel-level packaging (PLP) has emerged as a promising platform to address these requirements, offering the potential for higher throughput, better cost efficiency, and scalability for next-generation AI and high-performance computing applications. Significant investments are being made across the supply chain to accelerate PLP adoption, although challenges related to process maturity, warpage control, yield management, and ecosystem readiness must still be addressed before widespread deployment can be achieved.

Alongside PLP, glass core substrates are gaining momentum as an alternative material platform to support the growing demands of AI-driven systems. Their superior dimensional stability, low signal loss, and favorable thermal-mechanical properties make them attractive candidates for large-format packages and high-density interconnect architectures. However, the transition to glass-based substrates also introduces new challenges, including glass handling, via formation, reliability qualification, and integration within existing manufacturing infrastructures.

This presentation will share the market forecast and technology trends surrounding PLP and glass core substrates.

Speaker's Biography: 

Yik Yee (YY) Tan Ph.D. is a Principal Technology & Market Analyst, Semiconductor Packaging & Assembly at Yole Group. Dr. Tan holds a Ph.D. in Engineering from Multimedia University (MMU, Malaysia). She has more than 25 years of experience in semiconductor packaging. Based on her technical expertise and market knowledge, she develops technology & market reports and is engaged in dedicated custom projects.

Prior to Yole, Dr. Tan worked as a failure analyst and interconnect champion at Infineon Technologies (Malaysia) and later as an open innovation senior manager at Onsemi (Malaysia).

She published more than 30 papers and hold 4 patents and award winner for IEEE EPS - Regional 10 Contribution Award 2024 and IEEE Malaysia Section – Outstanding Industry Volunteer Award 2024.