Poised for Growth: Meeting the Challenges of Silicon Photonics

  Dr. Ruby YAN

  Vice President for Global Business Center, Guangzhou Zen Semiconductor Corporation, China     

Abstract: 

Driven by the explosive growth of AI computing and demands for high-speed interconnection, traditional electrical interconnections are approaching physical limits in bandwidth, latency, and power consumption. Silicon photonics has emerged as a critical technology pathway for advancing next-generation high-performance chips. Leveraging high-precision micro-nano tuning capabilities, MEMS structures are widely adopted in core silicon photonic functions including optical modulation, optical switching, beam steering, and wavelength tuning. As the fundamental building blocks for programmable, low-loss, and highly integrated photonic systems, MEMS devices strongly support AI scenarios such as high-speed data center interconnections and intelligent optoelectronic sensing.

Currently, the industry faces critical heterogeneous integration challenges between MEMS and CMOS. MEMS optical components require ultra-high precision, strict stress control, and hermetic packaging, making them process-incompatible with standard CMOS fabrication. Discrete chip solutions suffer from high link loss, large interconnection latency, and insufficient alignment accuracy, failing to meet the ultra-high bandwidth, low-latency, and high-density computing requirements of AI chip iteration, thereby limiting large-scale commercial adoption of silicon photonics.

Advanced heterogeneous packaging provides an optimal solution to break through these bottlenecks. Through 2.5D/3D stacking, high-precision wafer bonding, fan-out integration, and wafer-level hermetic packaging, heterogeneous integration of MEMS opto-mechanical structures, CMOS driving circuits, and photonic loops can be realized at the packaging level. This approach avoids fabrication incompatibility issues, significantly shortens optoelectronic interconnection paths, reduces crosstalk and power consumption, and improves the stability, consistency, and reliability of MEMS optical devices.

Efficient co-integration of MEMS and CMOS enabled by advanced packaging maximizes the advantages of silicon photonics. It effectively addresses the demands for high bandwidth, low power consumption, and miniaturization in AI computing clusters, high-speed interconnections, and next-generation intelligent chips, providing essential technical support for the industrialization of post-Moore optoelectronic integrated chips.

Speaker's Biography: 

Ruby Yan is an experienced semiconductor executive leading marketing and sales at ZenSemi, China’s first 12-inch advanced MEMS smart sensor and specialty process wafer manufacturer founded in 2021. The company focuses on 55–180nm process platforms covering MEMS sensors, analog chips and ASIC solutions.

Ruby draws on 15 years of industry experience at GlobalFoundries, where she most recently served as Business Line Executive, driving growth in sensing, display and security businesses. Her deep background enables strong collaboration between GlobalFoundries and ZenSemi, supporting the development of advanced semiconductor products and enhancing supply chain capabilities for the China market.

As a Master Inventor, Ruby holds more than 30 granted patents and over 70 professional publications. She is an active promoter of diversity and inclusion, having founded GlobalFoundries' ASIA@Europe ERG Group. She was recognized in the 2023 Women Engineers You Should Know list by the Society of Women Engineers and provides advisory support to Fraunhofer Institute, SEMI and tech startups.