Application Practice and Prospect of Advanced Packaging Technology in Intelligent Computing Chip Systems

  Prof. Daohong Yang

  Director of Yangtze Laboratory, Dean of the School of Integrated Circuits, Hubei University, China

Abstract:  

As artificial general intelligence and multi-agent technologies continue to advance rapidly, AI applications such as cloud inference and edge intelligence are being deployed at scale, making high compute density, high bandwidth, low latency, and high energy efficiency the key performance requirements for AI computing platforms. However, with the slowing pace of Moore's Law, traditional monolithic chip architectures are increasingly unable to meet the demands of highly intensive AI workloads. Advanced packaging is thus emerging as a core technological enabler for enhancing chip performance, supporting heterogeneous integration, and driving system-level innovation. Based on the development characteristics of AI foundation models and multi-scenario inference applications, this report systematically examines the new technical requirements imposed by AI computing scenarios in terms of chip compute capability, interconnect bandwidth, signal latency, and energy efficiency, and further establishes a differentiated performance evaluation framework for AI computing chips. Focusing on heterogeneous integration architectures, high-density interconnect technologies, and design-process co-optimization, the report analyzes the evolution trends and scenario adaptability of mainstream advanced packaging technologies. In light of industrial implementation challenges, it also summarizes the practical bottlenecks of advanced packaging in compute matching, thermal management, power control, and mass-production cost, and outlines the roadmap for technological iteration and industrialization. This provides a reference for technological innovation and engineering applications of advanced chip packaging for AI across diversescenarios. Looking ahead, system-level advanced packaging and heterogeneous co-design will become key directions driving the continuous evolution of AI computing platforms.

Speaker's Biography: 

Dr. Daohong Yang, PhD from Beijing University of Technologyand and Postdoctoral Fellow from Tsinghua University, currently holds the position of Director of Yangtze Laboratory and Dean of the School of Integrated Circuits at Hubei University, additionally serving as Vice Chairman of Integrated Circuits branch of China Semiconductor Industry Association (CSIA) and Chairman of Hubei Semiconductor Industry Association. He has long dedicated to technological and management innovation research in the integrated circuits field, successfully developing core chiplet integration technologies including wafer-level integration, heterogeneous integration and high-density silicon interposer, and advancing the industrialization of chips such as 3D computing-in-memory and special sensors. Dr. Yang has been honored State Council Special Allowance, selected for the National Special Support Program for High-Level Talents, and awarded Model of Jingchu, Hubei Province.